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Forte Design Systems - http://www.forteds.com
Develops software which aids your ASIC flow from design through verification. |
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Atrenta, Inc. - http://www.atrenta.com/
The Spyglass suite of tools uses predictive analysis technique that performs structural analysis on Verilog and VHDL RTL to detect design problems in SoCs and ASICs. |
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About Real Intent - http://www.realintent.com/
Breakthrough in logic verification. Funded by very experienced people from EDA |
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Innoveda - http://www.innoveda.com/
A merging of design software companies, which creates a complete PC based design environment. This includes everything from ASIC design to PCB design. |
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Icarus Verilog Interactive - http://ivi.sourceforge.net/
An Open Source interactive simulator frontend for Verilog and VHDL circuit simulation. |